VELDHOVEN, September 30 — The evolution of semiconductor lithography has been a foundational driver of technological progress since the 1960s, enabling the relentless miniaturization of transistors described by Moore’s Law. The journey began in the early 1960s with contact and proximity printing using mercury-vapor lamps, which allowed the first integrated circuits to be patterned at scales down to about 10 micrometers. By the mid-1970s, step-and-repeat aligners improved alignment accuracy and enabled larger wafer production, pushing feature sizes down to 5 micrometers.
The shift to projection lithography in the late 1970s and early 1980s, particularly with step-and-scan systems using ultraviolet light at 365 nm (i-line) and later 248 nm (krypton fluoride excimer laser), allowed resolution to reach 1.5 micrometers by the mid-1980s and 0.8 micrometers by 1990.
The UV Revolution
The adoption of 248 nm lithography in the early 1990s, pioneered by companies like ASML and Nikon, enabled the 0.35-micrometer node by 1995 and the 0.25-micrometer node by 1997. The transition to 193 nm lithography in the late 1990s, led by ASML’s PAS 5500/300 system introduced in 1997, allowed the industry to reach the 0.18-micrometer node in 1999 and the 0.13-micrometer node by 2001.
As conventional optical lithography approached physical limits, the industry developed resolution enhancement techniques such as off-axis illumination in the mid-1990s and phase-shift masks in the late 1990s, extending the usability of 193 nm lithography to the 90-nanometer node by 2004 and the 65-nanometer node by 2006. The introduction of immersion lithography in 2006, where water was used between the lens and wafer to increase numerical aperture, enabled ASML’s TwinScan systems to achieve 45-nanometer resolution by 2007 and 32-nanometer by 2009.
The EUV Breakthrough
Despite these advances, the semiconductor industry faced growing challenges as feature sizes approached the wavelength of light, prompting a decades-long effort to adopt extreme ultraviolet (EUV) lithography at 13.5 nanometers. EUV development began in earnest in the late 1990s through a public-private partnership known as EUV LLC, formed in 1997 by Intel, Motorola, AMD, and later joined by IBM and others, with significant funding from the U.S. Department of Energy’s national labs.
The first EUV engineering tools were delivered by ASML in 2010, but high-volume manufacturing readiness was not achieved until 2018, when ASML shipped its first NXE:3400B EUV scanner to Samsung for logic chip production. TSMC began risk production using EUV at the 7-nanometer node in 2018, and Samsung started EUV-based production of its 7-nanometer process in 2019.
By 2020, TSMC had moved to high-volume EUV production at the 5-nanometer node, and in 2021, both TSMC and Samsung began shipping chips made with EUV at the 3-nanometer node.
The Practical Upshot
The adoption of EUV has allowed the industry to continue scaling transistor density, with TSMC’s N3 process achieving over 300 million transistors per square millimeter and enabling advanced processors for smartphones, data centers, and artificial intelligence applications. As of 2023, ASML remains the sole supplier of EUV lithography systems, with each machine costing approximately $150 million and requiring over a year to install and calibrate. The company reported €18.6 billion in net sales in 2022, with EUV systems accounting for a growing share of revenue.
The continued advancement of lithography—from early contact printing to EUV—has directly enabled the exponential growth in computing power that underpins modern devices, from the Intel 4004 microprocessor of 1971, which contained 2,300 transistors, to Apple’s M2 Ultra chip of 2023, which contains over 134 billion transistors. Without these advances in patterning technology, the development of modern computing, mobile communications, cloud infrastructure, and AI-driven applications would not have been possible at the scale and speed observed over the past six decades.
