PLANO, Texas, September 25 — Siemens Digital Industries Software said this week it has widened its collaboration with Taiwan Semiconductor Manufacturing Company, adding an AI-powered agent that automatically fixes design rule violations in both digital and custom chip design flows. The announcement, made September 23 in Plano, builds on a relationship the two companies have maintained inside TSMC’s Open Innovation Platform ecosystem. The new agent is powered by Siemens’ Calibre software and tightly integrated with Aprisa software and Solido software.
In plain terms, think of it like a spell-checker that doesn’t just flag the typos in a chip layout — it corrects them, so engineers can spend their hours on harder problems.
What the agent actually does
Design rule checks are the gate every chip must pass before it can be manufactured. Foundries like TSMC publish rules governing how tiny features can be drawn, and violations have to be found and fixed before a design is cleared to move forward. Siemens says its new agent is designed to reduce manual effort, improve workflow efficiency and accelerate time-to-tapeout — the point at which a finished design is handed off for production.
Ankur Gupta, executive vice president of EDA IC Software at Siemens Digital Industries Software, said the collaboration exemplifies the company’s commitment to delivering AI-driven automation and advanced semiconductor design capabilities. Aveek Sarkar, director of the ecosystem and alliance management division at TSMC, noted that AI presents a significant opportunity to drive productivity and efficiency across increasingly complex semiconductor design workflows.
Beyond a single fix
The two companies are also working together on the Fuse EDA AI System and Fuse EDA AI Agent, which enable autonomous, long-running and self-verifying EDA workflows. These agentic workflows can reason across complex, multi-step design tasks, orchestrate actions across multiple EDA tools, and continuously validate and improve engineering outcomes. The Fuse EDA AI Agent is further enhanced by NVIDIA AI technologies, delivering greater token efficiency while improving reasoning and execution across long-running engineering workloads.
A key innovation is an AI-powered DRC-fix workflow that combines Calibre software, Aprisa AI and Solido Fuse technologies to intelligently identify, analyze and resolve design rule violations across digital and custom IC design flows. That builds on the Calibre Check Assist capability, which provides contextual guidance and design rule information during DRC debugging.
The collaboration also includes agentic custom IC design capabilities powered by Solido Fuse, and extends to agentic place-and-route and digital implementation workflows enabled by Aprisa software. Siemens’ EDA portfolio supports TSMC advanced process technologies, TSMC 3DFabric technologies and silicon photonics design enablement. The joint innovations aim to help mutual customers accelerate productivity, reduce manual effort and improve confidence from design through tapeout.
What to watch next is whether these agentic flows move from announcement to broad production use across TSMC’s most advanced nodes — and whether rivals in the EDA space answer with comparable automation of their own.
