SANTA CLARA, July 11 — Gordon Moore’s 1965 prediction about the future of computing has held up longer than almost anyone expected. The Intel co-founder, in a paper published that year, forecast that the number of transistors on an integrated circuit would double every two years. A decade later, in 1975, he refined that timeline to a doubling every two years.
For decades, that projection became something close to a self-fulfilling prophecy across the semiconductor industry. The numbers tell the story.
Intel’s 4004 processor, released in 1971, carried 2,300 transistors. By 1985, the Intel 80386 packed 275,000. The Pentium Pro from 1995 held 5.5 million.
The Core i7, launched in 2008, had 731 million. And by 2025, chips like the Apple M3 Ultra exceeded 100 billion transistors.
The cost per transistor has fallen from several dollars in the 1960s to less than one-millionth of a cent.
What changed
But by the 2020s, the physics began pushing back. Transistor density doubling has slowed to roughly three years, as engineers run up against atomic-scale limits and the challenge of dissipating heat from increasingly dense circuits. The semiconductor industry has responded by shifting to new architectures.
Rather than relying solely on shrinking transistors, chipmakers have turned to 3D stacking and advanced packaging techniques to keep performance climbing.
Behind the breakthrough
Moore’s original insight, published while he was still at Fairchild Semiconductor before co-founding Intel in 1968, was not a law of nature. It was an observation about economics and manufacturing momentum. That it guided an entire industry for more than half a century is remarkable.
For the engineers and scientists working on the next generation of chips, the practical consequence is that Moore’s Law, as the industry calls it, no longer follows a simple timetable. The race now involves stacking layers of transistors vertically, improving interconnects, and rethinking how chips are packaged together.
The Apple M3 Ultra’s 100 billion-plus transistors represent a scale that would have been unimaginable when Moore published his paper. Each of those switches, smaller than a virus, operates at speeds measured in gigahertz.
What to watch next
The industry’s focus has shifted from pure miniaturization to what engineers call “system-level scaling.” That means getting more performance from the entire package, not just the individual transistor. Advanced packaging, where multiple chips are bonded together in a single module, has become a critical path forward. So has 3D stacking, where logic and memory layers are built vertically rather than spread across a flat die.
Moore himself, before his death in 2023, acknowledged that his prediction would eventually run into fundamental limits. The question now is how far the industry can push beyond them with new architectures.
The answer will determine what kind of computing power becomes available in the years ahead, for everything from artificial intelligence to medical research to consumer electronics.
Sources
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